Wide frequency range delay locked loop

US7336752B2 · kind B2 · utility

Assignee

• Mosaid Technologies Incorporated · CA

Inventors

• Peter Vlasenko · Gatineau, CA
• Dieter Haerle · Villach, AT

Key dates

• Filing date: Dec 31, 2002
• Grant date: Feb 26, 2008
• Expiry date: Dec 20, 2024

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03L7/095
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

A delay locked loop operates over a wide range of frequencies and has high accuracy, small silicon area usage, low power consumption and a short lock time. The DLL combines an analog domain and a digital domain. The digital domain is responsible for initial lock and operational point stability and is frozen after the lock is reached. The analog domain is responsible for normal operation after lock is reached and provides high accuracy using smaller silicon area and low power.