Patent · US Active

Multi-level power monitoring, filtering and throttling at local blocks and globally

US7337339B1 · kind B1 · utility

67Cited by
15References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 15, 2005
Grant dateFeb 26, 2008
Priority date
Expiry dateAug 30, 2026

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D30/50
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Power management for a multi-processor chip includes a centralized global power manager that monitors global power for the whole chip, and local power managers. Local power managers manage power for local blocks such as processor cores, caches, and memory controllers. When a local block executes an instruction or accesses memory, an event is generated and looked up in a local power estimate table. A local power estimate for that event is sent to the global power manager, which sums all local power estimates received from all local blocks. An exponential moving average (EMA) is generated and compared to a global power threshold. When global power is over the threshold, local targets are sent to power managers that generate and monitor local power averages that must remain under the local target. The local block is throttled by the local power manager to reduce power when the local target is exceeded.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.