Clock error detection circuits, methods, and systems
US7339403B2 · kind B2 · utility
4Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2006 |
| Grant date | Mar 4, 2008 |
| Priority date | — |
| Expiry date | Sep 19, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/26
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Clock error detections circuits can detect clock duty cycle error and/or quadrature phase error. During an evaluation phase, capacitors are charged. During an evaluation phase, the capacitors are unequally discharged based on the error. A positive feedback mechanism latches the result.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.