Integrated circuit die configuration for packaging
US7341887B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 29, 2004 |
| Grant date | Mar 11, 2008 |
| Priority date | — |
| Expiry date | Aug 5, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Integrate circuit die terminal arrangements and configurations for mounting an integrate circuit die on a package substrate to reduce package transmission paths. In one embodiment, terminals for signals sensitive to trace length outside a die are arranged at the corners of the die. The die is mounted on a package substrate in an angle with respect to a package substrate to point the corners of the die at the edges of the package substrate to reduce trace length outside the die. The center of the die may or may not coincide with the center of the substrate. In one embodiment, when compare to a centered, non-rotated die mounting position, mounting a die with corners pointing at the edges of the package substrate does not cause significant differences in substrate warpage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.