Lead frame for semiconductor package and method of fabricating semiconductor package
US7341889B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 20, 2004 |
| Grant date | Mar 11, 2008 |
| Priority date | — |
| Expiry date | Jan 24, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a method for fabricating a semiconductor package with a lead frame and the semiconductor package provided thereof. The method includes supplying a lead frame with a plurality of molding regions for molding a plurality of semiconductor packages, and attaching tape to at least one surface of the lead frame to prevent a molten molding material from contacting the lead frame on that surface. The tape comprises a plurality of vacant regions corresponding to the boundary of each molding region. This method distributes the tension and expansion stress of the tape caused by a heating roller when laminating the tape on the lead frame, thereby preventing bending of the strip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.