Wafer street buffer layer
US7342296B2 · kind B2 · utility
6Cited by
2References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2005 |
| Grant date | Mar 11, 2008 |
| Priority date | — |
| Expiry date | Mar 16, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15787
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a separating process of a semiconductor device package of wafer level package. The method comprises a step of etching a substrate to form recesses. Then a buffer layer is formed on the first surface of the substrate, wherein the buffer layer is filled with the corresponding recesses to form infillings on adjacent the semiconductor device package. Dicing the wafer into individual package along substantial center of said infillings, the step may avoid the roughness on the edge of each die and also decrease the cost of the separating process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.