Method for forming a trench MOSFET having self-aligned features
US7344943B2 · kind B2 · utility
42Cited by
234References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2005 |
| Grant date | Mar 18, 2008 |
| Priority date | — |
| Expiry date | Mar 27, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/905
Abstract
A semiconductor device is formed as follows. A plurality of trenches is formed in a silicon layer. An insulating layer filling an upper portion of each trench is formed. Exposed silicon is removed from adjacent the trenches to expose an edge of the insulating layer in each trench, such that the exposed edge of the insulating layer in each trench defines a portion of each contact opening formed between every two adjacent trenches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.