CMP wafer contamination reduced by insitu clean
US7344989B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 19, 2005 |
| Grant date | Mar 18, 2008 |
| Priority date | — |
| Expiry date | Sep 15, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3212
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
Reducing CMP wafer contamination by in-situ clean is disclosed herein. The invention can be employed in a method in which a conductive layer is formed on a surface of a semiconductor wafer. After a portion of the conductive layer is removed, an acidic solution is directly or indirectly applied to the semiconductor wafer. Then the semiconductor wafer is engaged with a polishing pad as the acidic solution is applied directly or indirectly to the semiconductor wafer. In one embodiment, the portion of the conductive layer is removed by a CMP tool, and the semiconductor wafer is engaged with the polishing pad before the semiconductor is removed from the CMP tool.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.