Semiconductor device, noise reduction method, and shield cover
US7345892B2 · kind B2 · utility
5Cited by
12References
18Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | May 20, 2005 |
| Grant date | Mar 18, 2008 |
| Priority date | — |
| Expiry date | May 20, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K1/0218
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In a memory module, reference potential connecting patterns are disposed on high frequency signal lines and/or on the extension lines extending from the terminal ends of the signal lines as well as a shield cover for covering semiconductor memory chips is disposed on the substrate, and the reference potential connecting patterns are connected to the shield cover through metal cover contact parts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.