Method and apparatus for providing clocking phase alignment in a transceiver system
US7346794B1 · kind B1 · utility
12Cited by
14References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 21, 2005 |
| Grant date | Mar 18, 2008 |
| Priority date | — |
| Expiry date | May 19, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for providing clock phase alignment in a transceiver system are disclosed. Circuits are provided for providing clock phase alignment to adjust and align the phase between clock domain boundaries and for maintaining alignment of multiple outputs signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.