Method and system for evaluating design costs of an integrated circuit
US7346868B2 · kind B2 · utility
1Cited by
6References
36Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 11, 2005 |
| Grant date | Mar 18, 2008 |
| Priority date | — |
| Expiry date | Feb 21, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method and system for evaluating design costs of an integrated circuit are disclosed. The method includes choosing a design point for evaluation, dividing circuit specifications of the design point into at least two groups comprising a first group of specifications and a second group of specifications, computing a first set of design costs for the first group of specifications, estimating a second set of design costs for the second group of specifications using a predetermined set of reference costs, and determining a design cost of the design point using the first set of design costs and the second set of design costs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.