Interconnects for semiconductor light emitting devices
US7348212B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 13, 2005 |
| Grant date | Mar 25, 2008 |
| Priority date | — |
| Expiry date | Feb 22, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/831
Abstract
A semiconductor light emitting device including a light emitting layer disposed between an n-type region and a p-type region and contacts electrically connected to the n-type region and the p-type region is connected to a mount. A metal layer arbitrarily patterned to cover at least 20% of the area of the semiconductor light emitting device is plated on either a metal layer formed on the mount or a metal layer formed on one of the contacts. The plated metal layer may replace other known interconnecting techniques such as stud bumps. The semiconductor light emitting device is physically connected to the mount by causing interdiffusion between the contact surfaces of the metal layers. In some embodiments, a layer of solder is formed over the plated metal layer, and then the semiconductor light emitting device is physically connected to the mount by heating the solder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.