Flash memory and method of fabricating the same
US7348267B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2006 |
| Grant date | Mar 25, 2008 |
| Priority date | — |
| Expiry date | Jan 9, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
Abstract
A method of fabricating a flash memory device produces a device that has a small cell area and yet a high coupling ratio. First, a basic structure is provided that includes a substrate, a field isolation film protruding from the substrate, and floating gates disposed on the substrate on opposite sides of the floating gate. A first etch process is performed to remove a portion of the field isolation film and thereby expose upper portions of the floating gates. Then, a second etch process is performed to knock off the edges of the floating gates. Thus, a large amount of space is secured between the floating gates for a dielectric film and a control gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.