Method, system and computer program product for generating and verifying isolation logic modules in design of integrated circuits
US7349835B2 · kind B2 · utility
5Cited by
6References
35Claims
0Family size
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Key dates
| Filing date | Sep 21, 2004 |
| Grant date | Mar 25, 2008 |
| Priority date | — |
| Expiry date | Apr 29, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, system and computer program product for generating and verifying the correctness of isolation logic modules in design of integrated circuits (ICs). The method disclosed generates an isolation logic module for each power domain specified by a user, instantiates the generated module in a pre-determined wakeup domain, and then simulates shutdown conditions to ensure the correctness of the generated isolation logic module. The isolation logic is generated based on user-defined voltage constraints.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.