Patent · US Expired

Method and apparatus for accelerating through-the pins LBIST simulation

US7350124B2 · kind B2 · utility

6Cited by
6References
6Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 18, 2005
Grant dateMar 25, 2008
Priority date
Expiry dateMay 5, 2026

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/318357
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

The present invention provides a method, an apparatus, and a computer program product for applying external clock and data patterns for TTP-LBIST. A simulation model for the logic under test is set up in a simulator. Next, a user sets up an external LBIST block, which comprises pre-verified internal clock and data pattern logic, and connects this block to the logic in the simulation model. The internal clock and data pattern logic provides the input patterns used in OPCG modes of LBIST. This internal clock and data pattern logic is already verified through the design effort. Therefore, the internal pattern generators become the external pattern generators in the simulation model. The external LBIST block applies the external clock and data patterns, and subsequently, the user receives and processes these output patterns to determine if the logic operates correctly.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.