Method of improving on-chip power inductor performance in DC-DC regulators
US7351593B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 25, 2005 |
| Grant date | Apr 1, 2008 |
| Priority date | — |
| Expiry date | Apr 13, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M7/003
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method is provided for forming the ferromagnetic core of an on-chip inductor structure. In accordance with the method, a static, permanent magnet is placed in proximity to a semiconductor wafer upon which the ferromagnetic core is being electroplated. The permanent magnet is place such that the magnetic field is orthogonal to the wafer. The “easy” axis material is that plated parallel parallel to the magnet's field and saturates at a lower applied field. The “hard” axis is that plated perpendicular to the applied magnetic filed and saturates later, at a higher current level. This plating approach results in optimum magnetic alignment of the ferromagnetic core so as to maximize both the field strength/magnetic flux slope and magnitude before magnetic material saturation occurs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.