Regional signal-distribution network for an integrated circuit
US7353487B1 · kind B1 · utility
5Cited by
7References
6Claims
0Family size
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Key dates
| Filing date | Nov 5, 2004 |
| Grant date | Apr 1, 2008 |
| Priority date | — |
| Expiry date | Apr 16, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/396
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Signal distribution of a regional signal is described. A programmable logic device includes a global signal distribution network, a regional signal distribution network and a regional buffer. The regional buffer has an output coupled at an end of the regional signal distribution network. The regional signal distribution network is coupled to a configurable logic block via an interconnect tile. The regional buffer is coupled to a regional clock capable input/output block. Additionally described is a source synchronous interface for regional signal distribution.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.