Error correction for multi-level cell memory with overwrite capability
US7356755B2 · kind B2 · utility
79Cited by
4References
44Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 16, 2003 |
| Grant date | Apr 8, 2008 |
| Priority date | — |
| Expiry date | Aug 23, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5641
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-level cell memory that includes storing data in multiple cell densities is disclosed. The multi-level cell memory selectively includes error correction code. The multi-level cell memory may also include splitting cells into higher bits and lower bits in codewords.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.