Thin array plastic package without die attach pad and process for fabricating the same
US7358119B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 12, 2005 |
| Grant date | Apr 15, 2008 |
| Priority date | — |
| Expiry date | Jan 7, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18165
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for fabricating an integrated circuit package. Metal is plated up on a substrate to provide a plurality of contact pads and a plurality of fiducial markings on a periphery of the contacts. A transparent mask is selectively deposited on the substrate, over the fiducial markings. A semiconductor die is mounted on the substrate such that the contact pads circumscribe the semiconductor die and the semiconductor die is wire bonded to ones of the contact pads. The wire bonds are encapsulated and the semiconductor die and contact pads are covered in a molding material. The substrate is selectively etched to thereby etch away the substrate underneath the contact pads and the semiconductor die. The integrated circuit package is singulated from other integrated circuit packages by sawing using the fiducial markings.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.