Selective deposition to improve selectivity and structures formed thereby
US7358547B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2005 |
| Grant date | Apr 15, 2008 |
| Priority date | — |
| Expiry date | Nov 23, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
Methods and associated apparatus of forming a microelectronic structure are described. Those methods comprise providing a substrate comprising a region of higher active area density comprising source and drain recesses and a region of lower active area density comprising source and drain recesses, wherein the region of lower active area density further comprises dummy recesses, and selectively depositing a silicon alloy layer in the source, drain and dummy recesses to enhance the selectivity and uniformity of the silicon alloy deposition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.