Method for circuit block placement and circuit block arrangement based on switching activity
US7360193B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 21, 2004 |
| Grant date | Apr 15, 2008 |
| Priority date | — |
| Expiry date | Sep 27, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, algorithm, software, architecture and/or system for placing circuit blocks and/or routing wires in a circuit design is disclosed. In one embodiment, a method of placing can include: (i) determining a first signal path between first and second circuit blocks and determining a second signal path between first and third circuit blocks; and (iii) placing the first circuit block relative to the second and third circuit blocks in a position related to a switching activity of the first and second signal paths. The circuit blocks can include standard cells configured to implement a logic function, other components, or integrated circuits, for example. The switching activity can include a switching frequency determination based on simulation results of the first and second signal paths between the circuit blocks. Embodiments of the present invention can advantageously reduce power consumption as well as supply noise by optimally placing circuit blocks in an automated place-and-route flow. Further, signal integrity problems due to non-optimal circuit block or component placement can be minimized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.