Method for wafer-level package
US7361284B2 · kind B2 · utility
1Cited by
3References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 23, 2006 |
| Grant date | Apr 22, 2008 |
| Priority date | — |
| Expiry date | Dec 15, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/16235
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for wafer-level package. A cap wafer having cavities is bonded to a support wafer, and a portion of the cap wafer is etched through. The cap wafer is released from the support wafer, and bonded to a transparent wafer, and a portion of the cap wafer corresponding to the cavities is removed so that the remaining cap wafer forms a plurality of support blocks. A device wafer is provided, and the support blocks are bonded to the device wafer so that the support blocks and the transparent wafer hermitically seal the devices disposed in the device wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.