Method for creating a pattern in a material and semiconductor structure processed therewith
US7361453B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 15, 2005 |
| Grant date | Apr 22, 2008 |
| Priority date | — |
| Expiry date | Apr 3, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31144
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor device with precision patterning is disclosed. A structure of a small dimension is created in a material, such as a semiconductor material, using a first and a second pattern, the patterns being identical but displaced over a distance with respect to each other. Two mask layers are used, wherein the first pattern is etched into the upper mask layer with a selective etch, and the second pattern is created on the upper mask layer or on the lower mask layer at locations where the upper mask layer has been removed. A part of the lower mask layer and/or the upper mask layer is etched according to the second pattern, resulting in a mask formed by remaining parts of the lower and upper mask layers, the mask having a structure with a dimension determined by a displacement of the second pattern with respect to the first pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.