Reducing cracking of high-lead or lead-free bumps by matching sizes of contact pads and bump pads
US7361990B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 17, 2005 |
| Grant date | Apr 22, 2008 |
| Priority date | — |
| Expiry date | Mar 7, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package assembly comprises a first conductive pad on a semiconductor substrate; a second conductive pad on a package substrate; a bump physically coupled between the first conductive pad and the second conductive pad, wherein the bump is substantially lead-free or high-lead-containing; the bump has a first interface with the first conductive pad, the first interface having a first linear dimension; the bump has a second interface with the second conductive pad, the second interface having a second linear dimension; and wherein the ratio of the first linear dimension and the second linear dimension is between about 0.7 and about 1.7.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.