Register file with a selectable keeper circuit
US7362621B2 · kind B2 · utility
6Cited by
16References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2003 |
| Grant date | Apr 22, 2008 |
| Priority date | — |
| Expiry date | Jun 22, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/104
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A register file includes a multi-level multiplexer output circuit coupled to a global bit trace and keeper circuitry coupled to said global bit trace and a driving signal trace. The register file also has decoder circuitry coupled to said keeper circuitry to selectively decouple the driving signal trace from said global bit trace.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.