System and method for overcoming download cable bottlenecks during programming of integrated circuit devices
US7363545B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 3, 2002 |
| Grant date | Apr 22, 2008 |
| Priority date | — |
| Expiry date | Oct 16, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/267
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A software architecture for facilitating communications between a computer or workstation and a programming apparatus used to program a PLD by minimizing the number of two-way communications on a standard download cable (e.g., RS232, USB) connected between the computer and the programming apparatus. A first component used to encode programming instructions and configuration data to form a first transmission stream that is transmitted to the programming apparatus in a single, long burst. The programming apparatus includes a second component of the software architecture that interprets the first transmission stream and programs the PLD using, for example, Boundary-Scan signals that are generated in response to the programming instructions and configuration data. A buffer memory stores data shifted out of the PLD during the programming operation, which is transmitted to the computer in a single, long burst after the first transmission stream is completed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.