Method of high-performance flash memory data transfer
US7366028B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 24, 2006 |
| Grant date | Apr 29, 2008 |
| Priority date | — |
| Expiry date | Aug 7, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A flash memory system including a flash memory device and a controller, operable according to an advanced data transfer mode is disclosed. The flash memory device is operable both in a “legacy” mode, in which read data is presented by the memory synchronously with each cycle of a read data strobe from the controller, and in which input data is latched by the memory synchronously with each cycle of a write data strobe from the controller. In the advanced mode, which can be initiated by the controller forwarding an initiation command to the memory, the flash memory itself sources the read data strobe, and presents data synchronously with both the falling and rising edges of that read data strobe. In the advanced mode, the input data is presented by the controller synchronously with both edges of the write data strobe. The voltage swing of the data and control signals is reduced from conventional standards, to reduce power consumption.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.