Network media access controller embedded in a programmable logic device—statistics interface
US7366807B1 · kind B1 · utility
3Cited by
41References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 21, 2005 |
| Grant date | Apr 29, 2008 |
| Priority date | — |
| Expiry date | Aug 4, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0697
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A statistics interface for a media access controller is described. The media access controller core includes a receive engine configured to provide a receive statistics vector associated with receive traffic. The receive engine is configured to output the receive statistics vector within an inter-frame gap over a number of receive clock cycles, where a portion of the receive statistics vector is provided with each clock cycle of the receive clock cycles.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.