Dry etching methods
US7368396B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2005 |
| Grant date | May 6, 2008 |
| Priority date | — |
| Expiry date | Aug 25, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3081
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for etching semiconductor substrates using a deep reactive ion etching process to produce through holes or slots (referred to collectively as “slots”) in the substrates. The process includes applying a first layer to a first surface of substrate to provide an etch mask material layer on the first surface of the substrate. A second layer is applied to a second surface of the substrate to provide an etch stop material layer on the second surface of the substrate. The first layer and the second layer have similar solubilities in one or more organic solvents. The substrate is etched from the first surface of the wafers to provide a slot in the substrate. After etching the substrate, the etch mask material layer and the etch stop material layer are removed by contacting the first surface and the second surface of the substrate with a single organic solvent.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.