Static address mapping
US7370310B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 8, 2005 |
| Grant date | May 6, 2008 |
| Priority date | — |
| Expiry date | Jun 21, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Address map generation is described. More particularly, static addresses are obtained. A system design at least a portion of which is for instantiation in configurable logic of an integrated circuit is obtained. The system design includes a processor. At least one predefined circuit block in the design is identified as a peripheral connected to a processor. The at least one predefined circuit block is for instantiation in the configurable logic of the integrated circuit. Assigned to the at least one predefined circuit block is a static address range which is obtained from the static addresses. An address map for the design is generated having the at least one predefined circuit block with the static address range. Thus, for example, independent designers designing separate systems having a same set of peripherals may map to the same static address ranges independent of software system builder tool version, board, or processor used.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.