Method for manufacturing a transistor device having an improved breakdown voltage and a method for manufacturing an integrated circuit using the same
US7371648B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 1, 2006 |
| Grant date | May 13, 2008 |
| Priority date | — |
| Expiry date | Nov 11, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method for manufacturing a transistor device, and a method for manufacturing an integrated circuit including the same. The method for manufacturing the transistor device, among other elements, includes forming a gate structure over a substrate, implanting an atom selected from the group consisting of fluorine, silicon, or germanium into the substrate proximate the gate structure to cause at least a portion of the substrate to be in a sub-amorphous state, and implanting a dopant into the substrate having the implanted atom therein, thereby forming source/drain regions in the substrate, wherein the transistor device does not have a halo/pocket implant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.