Embedded silicon-controlled rectifier (SCR) for HVPMOS ESD protection
US7372083B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 9, 2005 |
| Grant date | May 13, 2008 |
| Priority date | — |
| Expiry date | Aug 9, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/127
Abstract
A high voltage p-type metal oxide semiconductor (HVPMOS) device having electrostatic discharge (ESD) protection functions and a method of forming the same are provided. The HVPMOS includes a PMOS transistor, wherein the PMOS transistor comprises a first source/drain region doped with a p-type impurity in a high voltage p-well (HVPW) region, a second source/drain region doped with a p-type impurity in a high voltage n-well (HVNW) region wherein the HVPW region and HVNW region physically contact each other, a field region substantially underlying a gate dielectric, and a first heavily doped n-type (N+) region in the HVPW region and contacting the first source/drain region. The device further includes an N+ buried layer underlying the HVPW region and the HVNW region and a p-type substrate underlying the N+ buried layer. The device has robust performance for both forward and reverse mode ESD.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.