Ball grid array package and process for manufacturing same
US7372151B1 · kind B1 · utility
404Cited by
45References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 12, 2003 |
| Grant date | May 13, 2008 |
| Priority date | — |
| Expiry date | Nov 2, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for manufacturing an integrated circuit package includes forming a plurality of solder balls on a first surface of a substrate and mounting a semiconductor die to the substrate such that bumps of the semiconductor die are electrically connected to conductive traces of the substrate. The semiconductor die and the solder balls are encapsulated in an overmold material on the substrate such that portions of the solder balls are exposed. A ball grid array is formed such that bumps of the ball grid array are electrically connected to the conductive traces and the integrated circuit package is singulated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.