Semiconductor device with split gate electrode structure and method for manufacturing the semiconductor device
US7375391B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 11, 2005 |
| Grant date | May 20, 2008 |
| Priority date | — |
| Expiry date | Jan 5, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/46
Abstract
A semiconductor device includes a substrate divided into a memory cell region and a logic region. A split gate electrode structure is formed in a memory cell region of a substrate. A silicon oxide layer is formed on a sidewall of the split gate electrode structure and a surface of the substrate. A word line is formed on the silicon oxide layer that is positioned on the sidewall of the split gate electrode structure. The word line has an upper width and a lower width. The lower width is greater than the upper width. A logic gate pattern is formed on a logic region of the substrate. The logic gate pattern has a thickness thinner than the lower width of the word line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.