Patent · US Expired

Distributed buffering system having programmable interconnecting logic and applications thereof

US7376767B1 · kind B1 · utility

15Cited by
12References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 4, 2002
Grant dateMay 20, 2008
Priority date
Expiry dateMar 23, 2025

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L49/9047
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

A distributed buffering system includes at least one input buffer, at least one serializing module, a at least one deserializing module, at least one output buffer, and a programmable logic device. The input buffer is operably coupled to store at least one data block of incoming data. The serializing module serializes the data block as it is retrieved from the input buffer to produce a serial stream of data. The programmable logic device receives the serial stream of data and distributes it to one or more of the at least one deserializing modules. The at least one deserializing module converts the serial stream back into the data block. The recaptured data block is then provided to the corresponding output buffer, which stores the recaptured data.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.