Method and system for checking rotate, shift and sign extension functions using a modulo function
US7376890B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 27, 2004 |
| Grant date | May 20, 2008 |
| Priority date | — |
| Expiry date | Feb 8, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2226
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of discovering a fault in a circuit is disclosed. The method comprises generating a first result of a selected function by performing the selected function on an operand, wherein the selected function employs a mask. Once the function is performed, an antimask of the mask is created, and the modulo of the antimask is calculated. A modulo function of the first result of the selected function is calculated to obtain a third result. A modulo of the operand is then calculated to obtain a fourth result, and a second function is then performed on the second result and the third result to obtain a fifth result. In response to comparing the fifth result to the fourth result, a signal is propagated to indicate a fault in the circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.