David A. Webber
15Patents
5h-index
26Co-inventors
62Inventor score
Filing activity: Sep 19, 1997 → Nov 22, 2013
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6311313A | X-Y grid tree clock distribution network with tunable tree and grid networks | Physics | 124 | Expired |
| US5970052A | Method for dynamic bandwidth testing | Physics | 81 | Expired |
| US6205571A | X-Y grid tree tuning method | Physics | 62 | Expired |
| US7735051B2 | Method for replicating and synchronizing a plurality of physical instances with a logical master | Physics | 5 | Active |
| US7783911B2 | Programmable bus driver launch delay/cycle delay to reduce elastic interface elasticity requirements | Physics | 5 | Active |
| US7676776B2 | Spare gate array cell distribution analysis | Physics | 4 | Active |
| US7376890B2 | Method and system for checking rotate, shift and sign extension functions using a modulo function | Physics | 4 | Expired |
| US7734944B2 | Mechanism for windaging of a double rate driver | Physics | 3 | Active |
| US8434051B2 | Schematic wire annotation tool | Physics | 2 | Active |
| US8024647B2 | Method and system for checking rotate, shift and sign extension functions using a modulo function | Physics | 2 | Active |
| US7146520B2 | Method and apparatus for controlling clocks in a processor with mirrored units | Physics | 2 | Expired |
| US9164912B2 | Conflict resolution of cache store and fetch requests | Physics | 0 | Active |
| US7991816B2 | Inverting data on result bus to prepare for instruction in the next cycle for high frequency execution units | Physics | 0 | Active |
| US7509365B2 | Inverting data on result bus to prepare for instruction in the next cycle for high frequency execution units | Physics | 0 | Active |
| US9075726B2 | Conflict resolution of cache store and fetch requests | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.