Method and apparatus for digital calibration of an analog-to-digital converter
US7378999B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 6, 2007 |
| Grant date | May 27, 2008 |
| Priority date | — |
| Expiry date | Mar 6, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/46
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Method and apparatus for digital calibration of an analog-to-digital converter (ADC). One example relates to calibrating an analog-to-digital (A/D) conversion system having an N-bit resolution. The A/D conversion system includes an ADC that generates an output having N most significant bits (MSBs) and M least significant bits (LSBs) (i.e., an N+M bit resolution). An offset calibration circuit is configured to determine an offset in the ADC and to compensate the N+M bit output using the offset to provide an N+M bit offset corrected output. A gain calibration circuit is configured to determine a gain correction factor for the ADC and to compensate the N+M bit offset corrected output using the gain correction factor to provide an N bit offset and gain corrected output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.