Flop repeater circuit
US7379491B2 · kind B2 · utility
0Cited by
11References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 24, 2003 |
| Grant date | May 27, 2008 |
| Priority date | — |
| Expiry date | Nov 7, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/35625
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A system is provided that includes a clocking circuit to provide two repeater clock signals and a flop repeater circuit to receive the two repeater clock signals and an input data signal. The flop repeater circuit to provide an output data signal based on the two repeater clock signals. The flop repeater circuit including a plurality of transistors and inverters coupled together to function as a flip-flop circuit that passes data without any full transmission gates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.