Dual work-function metal gates
US7381619B2 · kind B2 · utility
49Cited by
13References
11Claims
0Family size
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Key dates
| Filing date | Apr 27, 2004 |
| Grant date | Jun 3, 2008 |
| Priority date | — |
| Expiry date | Jul 31, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0177
Abstract
A semiconductor device having dual work-function structures, such as dual work-function gate electrodes of transistors. In the preferred embodiment in which NMOS and PMOS transistors are formed on a semiconductor device, the transistors are initially formed with a dummy gate electrode and a dummy dielectric layer. The dummy gate electrode and dummy dielectric layers are removed. A gate dielectric layer and a first electrode layer are formed. A nitridation process is performed on the NMOS transistor to reduce the work function of the gate electrode. A second electrode layer is then formed on the first electrode layer.
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