Patent · US Active

Method and apparatus for converting PWM signal to analog output voltage

US7382301B2 · kind B2 · utility

7Cited by
5References
20Claims
0Family size

Assignee

Inventor

Key dates

Filing dateOct 27, 2004
Grant dateJun 3, 2008
Priority date
Expiry dateOct 29, 2026

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M1/822
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A circuit for converting a duty cycle of a pulse width modulated signal to an analog value comprising a clock signal generator for generating a clock signal, a window generation circuit for generating a window signal synchronized with the pulse width modulated signal having a window having a window start and a window termination, a counter drive circuit receiving the clock signal, the pulse width modulated signal and the window signal and producing a counter input signal, a counter circuit for counting pulses of the counter input signal and providing a counter output, a reset circuit for resetting the counter at the termination of the window; and a digital to analog converter for converting the counter output at the termination of the window to the analog value.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.