System and method of electrostatic discharge protection for signals at various voltages
US7382592B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 23, 2005 |
| Grant date | Jun 3, 2008 |
| Priority date | — |
| Expiry date | May 7, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/819
Abstract
System and method for protecting an integrated circuit. The system includes a first transistor coupled to a first voltage and a second voltage, a second transistor coupled to the gate of the first transistor and the first voltage, a third transistor coupled to the gate of the second transistor and the first voltage, and a capacitor coupled to the gate of the second transistor and the second voltage. The first voltage is provided to the integrated circuit, the gate of the third transistor is configured to receive a first control signal, the gate of the second transistor is configured to receive a second control signal, and the second control signal is capable of turning off the second transistor a time period after the third transistor is turned off.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.