Methods of forming complementary metal oxide semiconductor (CMOS) transistors having three-dimensional channel regions therein
US7384850B2 · kind B2 · utility
4Cited by
6References
9Claims
0Family size
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Key dates
| Filing date | Mar 23, 2005 |
| Grant date | Jun 10, 2008 |
| Priority date | — |
| Expiry date | Feb 19, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
An integrated circuit device containing complementary metal oxide semiconductor transistors includes a semiconductor substrate and an NMOS transistor having a first fin-shaped active region that extends in the semiconductor substrate. The first fin-shaped active region has a first channel region therein with a first height. A PMOS transistor is also provided. The PMOS transistor has a second fin-shaped active region that extends in the semiconductor substrate. This second fin-shaped active region has a second channel region therein with a second height unequal to the first height.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.