Method and apparatus for increasing clock frequency and data rate for semiconductor devices
US7385872B2 · kind B2 · utility
0Cited by
5References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 17, 2006 |
| Grant date | Jun 10, 2008 |
| Priority date | — |
| Expiry date | Oct 17, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/023
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An embodiment of the present invention receives a data signal and at least one data shift signal that facilitates adjustment of the data signal and produces a resulting data signal with a data rate greater than a data rate of the data signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.