On chip diagnosis block with mixed redundancy
US7386769B2 · kind B2 · utility
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16References
27Claims
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Key dates
| Filing date | Sep 16, 2004 |
| Grant date | Jun 10, 2008 |
| Priority date | — |
| Expiry date | Jun 18, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/4401
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
On chip diagnosis method and on chip diagnosis block with mixed redundancy (IO redundancy and word-register redundancy) is provided. During a BIST (Built-In Self Test), information needed to apply redundancy resources is stored inside two arrays (fill_array, shift_array) on chip. A final diagnosis may apply redundancy resources based on this stored information. The first array (fill_array) is used to keep a minimum error mapping and the second array (shift_array) is used to control the fill of the first array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.