Primitive cell method for front end physical design
US7386821B2 · kind B2 · utility
4Cited by
4References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 9, 2006 |
| Grant date | Jun 10, 2008 |
| Priority date | — |
| Expiry date | Jun 9, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/392
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for forming an integrated circuit (280) comprises accessing (282) a library of primitive cells and edge codes in the formation of an integrated circuit layout. At least one edge code of at least one previously placed primitive cell (284) of the integrated circuit layout is used. A primitive cell is selected (286) from the library that is compatible with the at least one previously placed primitive cell and the selected primitive cell is placed into the integrated circuit layout adjacent the at least one previously placed primitive cell. The integrated circuit is manufactured (290) using the integrated circuit layout.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.