Efficient data reorganization to satisfy data alignment constraints
US7386842B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2004 |
| Grant date | Jun 10, 2008 |
| Priority date | — |
| Expiry date | Mar 29, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/4452
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An approach is provided for vectorizing misaligned references in compiled code for SIMD architectures that support only aligned loads and stores. In the framework presented herein, a loop is first simdized as if the memory unit imposes no alignment constraints. The compiler then inserts data reorganization operations to satisfy the actual alignment requirement of the hardware. Finally, the code generation algorithm generates SIMD codes based on the data reorganization graph, addressing realistic issues such as runtime alignments, unknown loop bounds, residue iteration counts, and multiple statements with arbitrary alignment combinations. Beyond generating a valid simdization, a preferred embodiment further improves the quality of the generated codes. Four stream-shift placement policies are disclosed, which minimize the number of data reorganization generated by the alignment handling.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.