Inventor · Chappaqua, NY, US

Alexandre E. Eichenberger

74Patents
14h-index
100Co-inventors
83Inventor score

Filing activity: Dec 12, 2003 → Dec 9, 2015

Most-cited inventions

PatentTitleAreaCited byStatus
US9081501B2 Multi-petascale highly efficient parallel supercomputer Emerging Cross-Sectional Technologies 85 Active
US8087010B2 Selective code generation optimization for an advanced dual-representation polyhedral loop transformation framework Physics 40 Active
US7493452B2 Method to efficiently prefetch and batch compiler-assisted software cache accesses Physics 34 Active
US8650240B2 Complex matrix multiplication operations with data pre-conditioning in a high performance computing architecture Physics 31 Active
US8577950B2 Matrix multiplication operations with data pre-conditioning in a high performance computing architecture Physics 25 Active
US8521961B2 Checkpointing in speculative versioning caches Physics 25 Active
US8458442B2 Method and structure of using SIMD vector architectures to implement matrix multiplication Physics 24 Active
US8549501B2 Framework for generating mixed-mode operations in loop-level simdization Physics 22 Active
US9971713B2 Multi-petascale highly efficient parallel supercomputer Emerging Cross-Sectional Technologies 22 Active
US9600281B2 Matrix multiplication operations using pair-wise load and splat operations Physics 19 Active
US7395531B2 Framework for efficient code generation using loop peeling for SIMD loop code with multiple misaligned statements Physics 15 Active
US8464271B2 Runtime dependence-aware scheduling using assist thread Physics 14 Active
US7865693B2 Aligning precision converted vector data using mask indicating offset relative to element boundary corresponding to precision type Physics 14 Active
US7386842B2 Efficient data reorganization to satisfy data alignment constraints Physics 14 Expired
US9563428B2 Schedulers with load-store queue awareness Physics 13 Active
US8667260B2 Building approximate data dependences with a moving window Physics 13 Active
US8087011B2 Domain stretching for an advanced dual-representation polyhedral loop transformation framework Physics 12 Active
US7367026B2 Framework for integrated intra- and inter-loop aggregation of contiguous memory accesses for SIMD vectorization Physics 11 Expired
US8370575B2 Optimized software cache lookup for SIMD architectures Physics 11 Active
US8146067B2 Efficient data reorganization to satisfy data alignment constraints Physics 10 Active
US8561044B2 Optimized code generation targeting a high locality software cache Physics 10 Active
US7730463B2 Efficient generation of SIMD code in presence of multi-threading and other false sharing conditions and in machines having memory protection support Physics 9 Active
US8561043B2 Data transfer optimized software cache for irregular memory references Physics 9 Active
US7475392B2 SIMD code generation for loops with mixed data lengths Physics 8 Active
US8245208B2 SIMD code generation for loops with mixed data lengths Physics 8 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.