Patent · US Active

Electronic package with integrated capacitor

US7388275B2 · kind B2 · utility

0Cited by

6References

4Claims

0Family size

Assignee

3M INNOVATIVE PROPERTIES COMPANY · US

Inventors

John D. Geissinger · Austin, US
Paul M. Harvey · Austin, US
Robert R. Kieschke · Woodbury, US

Key dates

Filing date	Jun 2, 2006
Grant date	Jun 17, 2008
Priority date	—
Expiry date	Oct 20, 2026

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/3011
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Generally provided is a circuit assembly construction for controlling impedance in an electronic package. A large scale, parallel-plate capacitor includes two electrodes separated by a dielectric material. The electrodes serve as reference voltage planes for the electronic package. At least one of the electrodes is patterned such that both electrodes are accessible from a common side of the capacitor. The capacitor is positioned with a first electrode mounted adjacent to an interconnect circuit portion of the electronic package. An electronic device portion of the electronic package is electrically connected, directly or indirectly, to one or more of the electrodes of the capacitor.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.