Semiconductor device fabrication method
US7390707B2 · kind B2 · utility
17Cited by
2References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2005 |
| Grant date | Jun 24, 2008 |
| Priority date | — |
| Expiry date | Jun 24, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/021
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The semiconductor device fabrication method comprising the step of forming a gate electrode on a semiconductor substrate; the step of forming a source/drain diffused layer in the semiconductor substrate on both sides of the gate electrode; the step of burying a silicon germanium layer in the source/drain diffused layer; the step of forming an amorphous layer at an upper part of the silicon germanium layer; the step of forming a nickel film on the amorphous layer; and the step of making thermal processing to react the nickel film and the amorphous layer with each other to form a silicide film on the silicon germanium layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.